TSMC's fifth consecutive record Q2: the compute crunch has become the new normal

In plain terms. The world's largest chip foundry is expected to book its fifth quarterly profit record in a row. This isn't news of a hot quarter - it's confirmation that the foundry bottleneck of the AI era is now a permanent feature, not a temporary shortage.

Context

This thread (tsmc-compute-crunch) started with June 2026 revenues at +68 %, then the January 2027 mature-node price hike propagating from advanced to trailing nodes and non-AI silicon (auto, industrial). Today's data point is a fifth consecutive record Q2, per Tech in Asia (16 July 2026). Read next to the parallel litho pinch (euv-litho-crunch) - ASML's third guidance upgrade this year and Intel's High-NA production start - the picture is coherent: capacity is not catching up.

Facts (as of the source date)

• Tech in Asia, 16 July 2026: TSMC seen posting a fifth straight record Q2 profit.
• June 2026 revenue: +68 % YoY (thread history).
• January 2027 mature-node price hike already announced.
• No new advanced-node capacity comes online at scale before H2 2027.

Analysis

Five records means the demand curve for advanced packaging and CoWoS has flattened the seasonality that used to shape TSMC's quarters. That has three consequences a builder or CFO needs to internalise. First, TSMC's pricing power is now stable enough to price forward - hence the mature-node hike. Second, capex plans that assumed 2027 relief will slip; the wafer allocation game runs another 18 months minimum. Third, the pinch has propagated upstream (ASML) and downstream (memory HBM, memory-chip-capex), so relief in one segment doesn't decompress the others.

Under the hood

The economic mechanism: CoWoS advanced packaging is the true bottleneck, not fab wafers. TSMC has been converting mature capacity to advanced, but the tooling cycle for a new fab is 24-36 months. Meanwhile Nvidia, AMD, Google TPUs, Amazon Trainium and Apple silicon compete for the same advanced-node line - with pricing that hyperscalers absorb because AI inference bills are absorbed by end-customer contracts.

Scenarios

Base case (60 %): TSMC keeps pricing power through 2027, records continue quarterly. Upside (25 %): Intel Foundry's High-NA node hits volume and takes a slice of leading-edge, capping TSMC's pricing power late 2027. Downside (15 %): a demand shock - one of the hyperscaler capex cycles freezes on a bad earnings quarter (see Oracle downgrade, fil ai-debt-financing) and TSMC gets a bullwhip.

So what

The physical-layer constraint won't lift. Design your unit economics around persistent high compute prices, and treat any "AI capex slowdown" news as noise until the CoWoS waitlist actually shortens.