Montage starts CXL 3.2 chip production - China gets a second memory-fabric supplier

Shanghai's Montage begins production of CXL 3.2 controllers - the memory-pooling fabric that reshapes AI-server economics gets a second Chinese supplier.

The fact

Tech in Asia reports on August 1, 2026 that Shanghai-based chip designer Montage Technology has started production of CXL 3.2 chips. CXL (Compute Express Link) is the interconnect standard that lets AI servers pool memory across CPUs, GPUs, and dedicated memory devices; 3.2 is the current live spec.

Our read

Montage is one of the small handful of vendors globally shipping CXL controllers - a niche that Samsung, SK Hynix, Micron, and Astera Labs also play in. Starting CXL 3.2 production matters for two reasons. First, at the technology level: pooled memory is one of the levers the industry is pulling to make large-model inference cheaper (memory bandwidth, not FLOPs, is often the binding constraint). Second, at the geopolitical level: China's sovereign compute stack now has a domestic CXL supplier to pair with CXMT's DRAM and Huawei's Ascend accelerators, reducing the number of remaining foreign-only choke points in an AI-server BOM. This is exactly the kind of unglamorous vertical integration that makes an ecosystem viable over 24-36 months.

What to watch

Volume ramp versus stated qualifications, whether Alibaba, Baidu, or ByteDance qualify Montage parts for their internal AI clusters, and any US export-control response to a Chinese CXL 3.2 supplier reaching production.